Silicon photonic circuits generally route optical signals in planar waveguides, and it is difficult to provide a path for light to enter/exit the circuits vertically. Routing light in or out of the wafer surface can be valuable for several reasons, such as coupling into a normal-incidence photodetector on the wafer surface, for wafer-level optical test/characterization, or other potential applications.
Of particular interest is the integration of planar silicon waveguides with Ge-based photodetectors. This is being addressed in several ways, all of which have various challenges. Planar photodetectors, in which the Ge is grown on top of the Si waveguide are quite large, because the optical coupling is inefficient and a long distance is needed for sufficient coupling of light to occur from the Si to the Ge.
To avoid this difficulty, trench sidewall photodetectors have been proposed, where the waveguide is terminated by a vertical facet. In this case, a facet with sufficient smoothness is difficult to form, and the epitaxial growth of the Ge-based photodetector can be very challenging.
Another area of interest is that of wafer-level optical testing. Currently, silicon photonic die must be singulated and have the edges polished in order to do optical testing; this is an expensive and time consuming process. The vertical mirror would enable rapid and inexpensive optical testing at the wafer level, dramatically reducing development times and testing costs.